The AD MUX I/O architecture introduces pin sharing between data and addresses, reducing the number of pins required by the memory chip and consequently adding cost savings for the microprocessor system. The additional savings will provide cellular phone manufacturers with a considerable competitive advantage, especially for mobile applications for which cost is an essential element in successful market penetration.

The AD MUX I/O architecture allows either an increase of data bus width with no pin count increase or a reduction in pin count without loss of performance. The smaller package mechanical dimensions than might otherwise be used, and the consequent reduction in printed-circuit board size, lowers costs for handset manufacturers.

These new devices are developed from existing and successful NOR Flash products. ST consistently provides optimum solutions in terms of technology developments, architectural structures, and advanced performances. Typically, the most advanced features are coupled with the highest performing applications, to provide specific end-user benefits. The introduction of the new AD MUX I/O series now ensures wide coverage of NOR Flash requirements across all segments of the mobile phone market.

The AD MUX I/O portfolio includes both standalone and subsystem solutions, based on one-bit and two-bit-per-cell technology, which accommodates increasing memory density with optimized die size in 130nm and 90nm manufacturing technologies. The family offers Burst Mode and Multiple Bank architectures, and are available in LFBGA88 (8x10mm), LFBGA107 (8x11mm), or VFBGA44 (7.5x5mm) packages.

The standalone NOR Flash memories range from 16- to 64-Mbit densities in one-bit-per-cell technology, and from 128- to 256-Mbit densities in two-bit-per-cell technology.

    The subsystem solutions include the following initial combinations:

    128Mb NOR Flash + 64-Mbit PSRAM (M36L0R7060L1/U1)
    128Mb NOR Flash + 32-Mbit PSRAM (M36L0R7050L1/U1)

Additional subsystem solutions (64-Mbit Flash + 32-Mbit PSRAM, 64-Mbit Flash + 16-Mbit PSRAM, 32-Mbit Flash + 16-Mbit PSRAM) will be available soon to complete the portfolio.

    Samples are available now, with volume production planned for Q3 2006.

    This press release is also available at
http://www.st.com/stonline/stappl/press/news/year2006/p2028.htm

     ... with links to further information on the AD MUX I/O Flash family

About STMicroelectronics

STMicroelectronics is a global leader in developing and delivering semiconductor solutions across the spectrum of microelectronics applications. An unrivalled combination of silicon and system expertise, manufacturing strength, Intellectual Property (IP) portfolio and strategic partners positions the Company at the forefront of System-on-Chip (SoC) technology and its products play a key role in enabling today's convergence markets. The Company's shares are traded on the New York Stock Exchange, on Euronext Paris and on the Milan Stock Exchange. In 2005, the Company's net revenues were $8.88 billion and net earnings were $266 million. Further information on ST can be found at http://www.st.com.

Web site: http://www.st.com/